floofloof@lemmy.ca to Linux@lemmy.mlEnglish · 1 year agoDebian Linux is Joining The RISC-V Bandwagonwww.howtogeek.comexternal-linkmessage-square38fedilinkarrow-up1353arrow-down17
arrow-up1346arrow-down1external-linkDebian Linux is Joining The RISC-V Bandwagonwww.howtogeek.comfloofloof@lemmy.ca to Linux@lemmy.mlEnglish · 1 year agomessage-square38fedilink
minus-squareCevedale@feddit.delinkfedilinkarrow-up2arrow-down1·edit-21 year agoYes and no. AFAIK when coding assembler for these chips you use CISC-instructions but they get translated into RISC-instructions by a hardcoded mikroprocessing-unit (not sure about the real term). So the processor itself gets RISC-instructions.
minus-squareBiblbrox@lemmy.worldlinkfedilinkarrow-up1·1 year agoIn reality it seems to be more complicated: https://fanael.github.io/is-x86-risc-internally.html
Yes and no. AFAIK when coding assembler for these chips you use CISC-instructions but they get translated into RISC-instructions by a hardcoded mikroprocessing-unit (not sure about the real term). So the processor itself gets RISC-instructions.
In reality it seems to be more complicated: https://fanael.github.io/is-x86-risc-internally.html